High-Mobility Ge p- and n-MOSFETs With 0.7-nm EOT Using $\hbox{HfO}_{2}/\hbox{Al}_{2}\hbox{O}_{3}/\hbox{GeO}_{x}/\hbox{Ge}$ Gate Stacks Fabricated by Plasma Postoxidation

An ultrathin equivalent oxide thickness (EOT) HfO
₂
/Al
₂
O
₃
/Ge gate stack has been fabricated by combining the plasma postoxidation method with a 0.2-nm-thick Al
₂
O
₃
layer between HfO
₂
and Ge for suppressing HfO
₂
-GeO
x
intermixing, resulting in a low-interface-state-density (
D
_it
) GeO
x
/Ge metal-oxide-semiconductor (MOS) interface. The EOT of these gate stacks has been scaled down to 0.7-0.8 nm with maintaining the
D
_it
in 10
¹¹
cm
^-2
·eV
^-1
level. The p- and n-channel MOS field-effect transistors (MOSFETs) (p- and n-MOSFETs) using this gate stack have been fabricated on (100) Ge substrates and exhibit high hole and electron mobilities. It is found that the Ge p- and n-MOSFETs exhibit peak hole mobilities of 596 and 546 cm
²
/V·s and peak electron mobilities of 754 and 689 cm
²
/V·s at EOTs of 0.82 and 0.76 nm, respectively, which are the record-high reports so far for Ge MOSFETs in subnanometer EOT range because of the sufficiently passivated Ge MOS interfaces in present HfO
₂
/Al
₂
O
₃
/GeO
x
/Ge gate stacks.