Managing mutex variables in a cache-coherent shared-memory system for FPGAs

Modern FPGAs have the ability to place many processing elements on a single die that can access shared memory. In a multiprocessing system, mutex variables are often used to provide proper synchronization and access to memory locations shared by the processing elements. This paper introduces a novel technique to manage mutex variables in caches for FPGAs, and is compared to an off-the-shelf system built mostly by components from an FPGA vendor. Results show that a cache-coherent system using our proposed technique performs more barriers per second than the off-the-shelf system with comparable hardware resources while also providing coherent caches.