Improvement on MISC computer memory architecture based on forth

In order to save the inconvenience on byte access of ROM register, this paper gives an improved memory management for stack computers. This solution has designed an address management unit for the 16-bit macro computer based on forth operating system. It also makes a detailed description of the specific composition of the components and makes functional simulations on FPGA platform. The experiments show that the improved processor has succeeded in reading and writing data in bytes, 16-bit or 32bit. By increasing the types of CALL instruction, this memory management increases ROM space constraints.