Foreground detection and image segmentation in a flexible ASVP platform for FPGAs

This demonstration shows an early prototype of low-level image processing to be used in an embedded smart camera, that is foreground detection and image segmentation. The example uses camera with resolution 640×480 pixels for input images processed at 100MHz in the FPGA. The input can be easily extended to higher resolutions. The processed output is displayed on LCD screen.