300 KG gate-array LSI using 0.25-/spl mu/m ultra-thin-film fully-depleted CMOS/SIMOX with tungsten-deposited source/drain

Summary form only given. We fabricated a 300 kG gate-array LSI using 0.25 /spl mu/m ultra-thin-film fully-depleted (FD) CMOS/SIMOX technology with tungsten selective CVD (W-SCVD) to reduce S/D sheet resistance. The usefulness of this technology was confirmed by the fully-functional operation of the LSIs consisting of basic cells with a single diagonal contact.