High speed SOI buffer circuit with the efficient connection of subsidiary MOSFETs for dynamic threshold control

Summary form only given. We propose a new non-inverting SOI buffer circuit adopting dynamic body bias control via subsidiary MOSFETs connected efficiently to obtain high speed at low supply voltage. Device simulation has been performed to show current derivability of body controlled devices. Delay time characteristics of the buffer circuit were analyzed by SPICE simulation and compared with those of SOI CMOS buffer circuit. Delay time reduction of the SOI buffer circuit over conventional SOI CMOS buffer circuit with same area is about 36% at V/sub s/=1.2 V and C/sub L/=2 pF.