A fuzzy logic controller with reconfigurable, cascadable architecture

A general-purpose fuzzy logic inference engine for real-time control applications has been designed and fabricated in a 1- mu m, 3.3-V, DLM CMOS technology. Up to 102 rules are processed in parallel with a single 688 K transistor device. Features include a dynamically reconfigurable and cascadable architecture, a TTL-compatible host interface, laser programmed redundancy, a special mode for testability, RAM rule storage, and on-chip fuzzification and defuzzification.<
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