Isomorphic Recursive Splitting: Conflict-Free Memory Accesses for Structured Memory

Data organization for matrices and arrays in memory has been extensively studied since the early 70's and until the mid 90's - the vector computers golden age. But this old SIMD model seems more topical than ever, as shown by the use of GPU in high performance computers or the architecture of the Nec SX-9. Such memory organization should then be considered again in order to access efficiently data structures for high performance computations. However in almost all existing studies, the assumptions made were unrealistic: the memory model was incorrect. In fact, the memory structure was assumed to be linear (i.e. all banks identically accessible by bus(ses)), which is not the case due to the large number of memory banks (up to 32768 in a Nec SX-9). Indeed, there is nothing to be gained from connecting all the banks to one bus, and supplying one bus per bank is clearly not feasible. In order to solve this problem, architects use to structure memory in 2 (or more) dimensions: memory is organized in a number of sections, each section being composed of several banks. The problem is that classical schemes do not avoid conflicts on both the banks and the sections. In this paper, we will introduce a simple way to adapt any existing classical scheme to real memory organization: Isomorphic Recursive Splitting (IRS). The few existing works are presented, and the general theory of recursive splitting is defined. We also show, using two examples, how this model can be applied very easily and at no extra cost.