IEEE Draft Standard Test Access Port and Boundary Scan Architecture

Circuitry that may be built into an integrated circuit to assist in the test, maintenance and support of assembled printed circuit boards is defined. The circuitry includes a standard interface through which instructions and test data are communicated. A set of test features is defined, including a boundary-scan register, such that the component is able to respond to a minimum set of instructions designed to assist with testing of assembled printed circuit boards. Also, a language is defined that allows rigorous description of the component-specific aspects of such testability features.