Study and realization of a novel high-voltage planar periphery [power semiconductor diodes]

A new methodology for designing a high voltage PLANAR periphery type single-pocket is presented in this paper. A geometry of the periphery type single-pocket which corresponds to the desired voltage-blocking capability characteristic can be obtained though this approach. The electric model presented can lead to a study of the electric field distribution in this periphery. The sensitivity of voltage-blocking capability of the periphery type single-pocket in relation to the implanted dose in the pocket was studied. Experimental results, which confirm the high sensitivity to the implanted dose are also presented. Based on this study, the authors developed the periphery type double-pocket in order to reduce this sensitivity and improve the breakdown voltage. The voltage-blocking capability of this structure is less sensitive to the implanted dose as compared to the structure single-pocket. An optimum structure double-pocket has been found for a given substrate. They have applied this periphery double-pocket to various power PIN silicon diodes with blocking voltages ranging from 2 kV to 3.5 kV. In all cases, they reached the ideal breakdown voltage for an abrupt one dimensional p-n junction.