Low cost Cu column fcPoP technology

Package-On-Package (PoP) is now a wide-spread 3D package technology used in Smartphones, TABLET devices, and in some Gaming applications. The vertical integration of high speed memory packages such as DDR-II and form factor reduction are the main drivers for adoption of these package types. Continuous trends in bump pitch reduction and performance improvement in combination with higher density Si have created the need for Cu column design for Flip Chip bumps. Also, adoption of Cu column and the associated Bond-on-Lead (BoL) technology provide substrate cost reduction through design rule relaxation, which is key for cost sensitive PoP packages and consumer electronics, in general. In this paper a 65nm Si originally designed with wire bond pads is converted to Flip Chip using the Bond-on-Lead (BoL) interconnect structure. Cu column height and solder cap volume are optimized to allow for uniform wetting of bump to substrate trace while also providing the required gap height needed for proper Capillary Underfill (CUF) process, which otherwise would have not been possible by using the solder bumps at such a given tight bump pitch. Center grid bump array at 250um bump pitch was added to the original design in order to provide mechanical support for the Flip-Chip-attached die and also to promote the CUF process. Polyimide re-passivation was used prior to bumping process in order to enable a Cu bump structure with suitable design rules for assembly with the additional benefit of providing Low-K dielectric protection. The CUF process was successfully developed for sub-50 um stand-off height to meet the void-free process requirement. Package type is a 12×12mm bare-die fcPoP configuration with 6 layer Build-Up (BU) and top and bottom ball pitch of 0.5mm and 0.4mm, respectively. All functional tests and package level reliability including Moisture Sensitivity Level-3 (MSL3), Temperature Cycle-B (TC-B) 500 cycles, High Temperature Storage (HTS) 500 hours, and unbiased HAST 96 hours were successfully passed. Board Level Reliability (BLR) tests including Drop Shock and Temperature Cycle were completed and successfully passed with the first failure in drop test occurring at 152 cycles, and no failures up through 1000 cycles of temperature cycle.