Novel triple-threshold-voltage eight-transistor SRAM circuit with enhanced overall electrical quality

Data stability is a primary concern in today's high performance memory circuits with deeply scaled transistors and power supply voltages. Recently proposed eight-transistor (8T) Static Random Access Memory (SRAM) cells offer enhanced data stability as compared to the conventional six-transistor (6T) SRAM cells by isolating the bitlines from data storage nodes during a read operation. Novel multi-threshold-voltage (multi-V
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) eight-transistor SRAM cells with enhanced data stability and superior overall electrical quality characteristics are presented in this paper. The design tradeoffs of 8T multi-V
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SRAM cells are explored with a TSMC 65nm CMOS technology that provides a rich set of device threshold voltage options. The best triple-threshold-voltage 8T memory cell offers up to 7.3X and 3.2X higher overall electrical quality as compared to previously published single-threshold-voltage and dual-threshold-voltage 8T SRAM cells, respectively.