SRAM lifetime improvement by using adaptive proactive reconfiguration

Modern generations of CMOS technology nodes are facing critical causes of hardware reliability failures, which were not significant in the past. Such vulnerabilities make it essential to investigate new robust design strategies at the Nano-scale circuit system level. In this paper we have introduced an adaptive proactive reconfiguration technique that considers the inherent process variability (variability-aware) and BTI aging, and effectively enlarges the SRAM lifetime.