A novel application of FPGA-based partial dynamic reconfiguration system with CBSC

Dynamic reconfiguration system allows us to dynamically allocate hardware resources as needed by particular applications. This paper focuses on the application of FPGA-based partial dynamic reconfiguration system (PDRS) with configurable boundary-scan circuit (CBSC), which can be used in many different fields, especially in the military and aerospace fields. Generally speaking, if an important function such as key encryption needs to be changed in a PDRS operating on a high security system, the corresponding logic resources need to be verified and tested again before being reconfigured. By making use of the CBSC technology, the effective speed of fault diagnosis for target FPGA will be accelerated, and the reliability of the PDRS will be improved. A PCB-level platform which can be used as a common platform for SRAM-based FPGA has been designed with BQV series FPGA of BMTI in this paper. Verified with test vectors of BQV600, the complete testing time for logic resources of BQV600 has been decreased significantly.