Design & implementation of floating point ALU on a FPGA processor

In this paper, the implementation of DSP modules such as a floating point ALU are presented and designed. The design is based on high performance FPGA “Cyclone II” and implementation is done after functional and timing simulation. The simulation tool used is ModelSim. The tool for synthesis and implementation is Quartus II. The experimental results shows the functional and timing analysis for all the DSP modules carried out using high performance synthesis software from Altera.