Simulation study of SOI four gate transistor

The structure of silicon-on-insulator (SOI) four-gate transistor (G
⁴
-FET) and its different parameters for different biasing conditions are studied. A G
⁴
-FET simulation model was developed by Silvaco/Atlas 3-D simulator which incorporates non-ideal effects like concentration dependent mobility, Shockley-Read-Hall recombination, Auger recombination, bandgap narrowing effect. This model can be useful in measuring parameters dependency of a SOI four gate transistor.