Morphology of CdS thin films: Pinholes and their effect on open circuit voltage in CdS/CdTe solar cells

CdTe solar cells are lagging other similar types of solar cell devices with similar band gap in terms of performance primarily due to lower open circuit voltage V_OC (voltage deficit). Cadmium Sulfide (CdS) films affect V_OC. When CdS thickness is high (more than 200 nm), it absorbs some of the photons and thus generated photocurrent is reduced but the open circuit voltage is maintained. When its thickness is reduced below 100 nm, photocurrent is increased but the voltage drops. This voltage loss might be due to formation of localized weak (CdTe/TCO) diodes or it might be due to some electronic effects. CdS films of different thicknesses were produced using the Advanced R& D Deposition System and were studied. The presence of pinholes in CdS film thicknesses between 30 to 200 nm was investigated using Blue Light Transmission Microscopy (BLTM). SEM images and EDS analysis were conducted to confirm results of BLTM, differentiate CdS film and pinholes, to check surface morphology and chemical composition of different film areas. There are two main categories of pinholes: natural and artificial. Natural sources include lack of grain coalescence and TCO surface roughness. Artificial sources as observed in experiments include scratches, scuffing marks, dust or particulates and cleaning issues. Results thus far indicate that the primary causes of pinholes in CdS films are dust and/or particulates and cleaning issues.