Monolithically integrated thin film III-V/Si solar panel on wafer for active power management

We have demonstrated a monolithically integrated solar panel on Si that allows scaling of cell output voltage on the wafer level. Our design also incorporates integrated bypass diodes and the possible incorporation of CMOS for active power management at the materials integration level. In addition, we have demonstrated the first GaAsP/SiGe dual junction solar cell on Si that provides the ideal bandgaps for the highest efficiency for solar spectra between AM0 and AM1.5. Combined with future, CMOS-based active power management, the solar panel on wafer (SPOW) design enables maximum power output and ideally managed power profiles under non-ideal, and time-varying illumination conditions. The result is improved reliability, lower system cost, and higher specific power over conventional III-V PV array technology.