Toward all optical interconnections in chip multiprocessor

The increasing need to reduce power consumption and interconnection complexity in optical network on chip requires new configurations and strategies to interconnect cores in one chip. In this paper we present a new configuration of an optical network on chip (ONoC) in which the routing of control and payload data is done optically. So we can reduce the use of electric signals in the router itself. To validate and confirm our choice, we conducted a study of all types of losses that may happen to the signal across the network using FDTD-based simulators, and finally taking into account the results of this study, we present an algorithm that allows us to estimate the maximum loss of each connection between any processors of the network. This estimation allows us to assess the reliability of such configuration. In a network, the number of rings in each router was reduced to 4, allowing 30% reduction of power consumption compared to Huaxi Gu et al [1]. We will study too active microresonator behavior, mainly resonance frequency in order to find the most suitable frequency to modulate signals. The use of such routers in ONoC has several benefits such as a static and simple routing algorithm and more interconnection capacity compared to other proposed routers [1] [2][3].