Process and device optimization of a 30-GHz f/sub T/ submicrometer double poly-Si bipolar technology

A 30-GHz f/sub T/ submicrometer double poly-Si bipolar technology has been developed. Performance trade-off characteristics of npn transistors are re-examined as functions of primary process parameters to satisfy the requirements of high-speed analog and analog mixed with digital circuit applications. Schottky diodes, lateral pnp transistors, and laser wafer trimmable precision NiCr resistors by using one additional photo-masking process step. Manufacturability issues such as improvement of C-E leakage currents, RIE process effects on emitter poly-Si to Si interface properties, and planarization of double poly-Si emitter/base structures using a BPSG film reflow process are investigated.