Design steps towards a 40-kVA SiC inverter with an efficiency exceeding 99.5%

This paper describes the concept, the design, the construction, and experimental investigation of a 40 kVA inverter with Silicon Carbide Junction Field Effect Transistors. The inverter was designed to have an efficiency exceeding 99.5%. Due to the low losses free convection cooling could be used. Since no fans are used the reliability can be increased compared to solutions with fans. A very low conduction loss has been achieved by parallel connecting ten 85 mΩ normally-on JFETs in each switch position. A special gate-drive solution was applied forcing the transistors to switch very fast (approx. 20 kV/μs) resulting in very low switching losses. As the output power is almost equal to the input power a special effort was done to precisely determine the amount of semiconductor power losses via comparative thermal measurements. A detailed analysis of the measurements shows that the efficiency of the inverter is approximately 99.7% at 40 kVA.