Impacts of NBTI/PBTI on SRAM VMIN and design techniques for SRAM VMIN improvement

Negative Bias Temperature Instability (NBTI) and Positive Bias Temperature Instability (PBTI) are critical circuit reliability issues in highly scaled CMOS technologies. In this paper, we analyze the impacts of NBTI and PBTI on SRAM Vmini and present a design solution for mitigating the impact of NBTI and PBTI on SRAM V
_MIN
. Two different SRAM V
_MINS
(SNM-limited V
_MIN
and time-limited V
_MIN
) are explained. Simulation results show that SNM-limited V
_MTN
is more sensitive to NBTI while time-limited V
_MTN
is more prone to suffer from PBTI effect. NBTI/PBTI-aware control of wordline pulse width and sense amplifier enable time mitigates the V
_MIN
degradation induced by NBTI/PBTI.