Temperature impact on double gate nTFET ambipolar behavior

Considering that the continuous MOS scaling is driving the behavior of this technology to its theoretical limit, new approaches have been considered as alternatives to the future devices generations. In this context, Tunnel Field Effect Transistors (TFETs) have been proposed as a promising option, since its physical structure allows subthreshold swing to reach values lower than 60mV/dec at room temperature [1]. Therefore, these devices would be suitable for ultralow power applications even being implemented with standard SOI CMOS processing techniques.