Thermal-aware device design of nanoscale bulk/SOI FinFETs: Suppression of operation temperature and its variability

The self-heating effects in Bulk/SOI FinFETs have been systematically investigated and compared. It is demonstrated that lattice temperature is significantly lower in Bulk FinFETs owing to the larger heat dissipation to the Si substrate. Heat dissipation paths in Bulk/SOI FinFETs have been studied and the device-parameter dependence of thermal characteristics has been analyzed. It is demonstrated that the Bulk FinFETs show greater temperature fluctuations resulting from device parameter variations. The fluctuation can be greatly suppressed by miniaturizing the extension length. It is shown that the impact of thermal resistance at the MOS interface is more significant in SOI FinFETs than in Bulk FinFETs.