Mobility profiles and thermal characterization of SOI and Si-on-SiC hybrid substrates

This paper presents new results revealing the electrical properties of the silicon-on-polycrystalline silicon carbide hybrid substrate. The thermal resistance in the substrate was measured and compared to simulations and is linked to the measured reduced self-heating in LDMOS transistors. The mobility in the device layer was extracted and shows slightly lower values in the hybrid compared to the SOI. Furthermore, the gate oxide integrity was evaluated suggesting that the poly-Si layer in the Si/SiC hybrid may act as a gettering layer for impurities due to the lower QBD spread.