Implementation of optimal PID control for chaos synchronization by FPGA chip

This paper is concerned with the design of a FPGA-based digital proportional-integral-derivative (PID) controller for synchronization of a continuous chaotic model. By using the EP algorithm, optimal control gains in PID controlled chaotic systems are derived such that a performance index of integrated absolute error (IAE) is as minimal as possible. To verify the system performance, basic electronic components containing OPA, resistor and capacitor elements are used to implement the chaotic Sprott circuits and the proposed digital PID controller is implemented by the FPGA technology. Finally, numerical and experimental results exemplify the synchronization procedure.