Digitally controlled pulse-width-pulse-position modulator in an 1.2V 65 nm CMOS technology

This paper presents a pulse-width and position modulator (PWPM) topology suitable for digital centric polar transmitter frontends suitable for software defined radios. PWPM enables the usage of highly efficient switching-mode power amplifiers (SMPA) and direct control of the output power. The presented first implementation of the modulator targets 3GPP and Long Term Evolution (LTE) base-stations and mobile devices operating in the bands E-UTRA frequency bands V, V I and XX. The proposed modulator generates all possible phases by a delay lock loop. A combination of two multiplexer circuits and an AND-gate allows to digitally select the wanted phase and duty cycle. The achievable phase and time resolution is 11:2° and 35 ps at 900MHz, which is sufficient for these applications. The feasibility of the implementation was verified by simulations on extracted layouts.