Optical burst switching for many-core processor-to-memory photonic networks

Existing electrical DRAM technologies are not expected to supply sufficient bandwidth for many-core architecture as hundreds of cores are integrated on a single chip in the near future. The discrepancy of many-core processor-to-memory bandwidth will continue to enlarge. In this paper, we introduced optical burst switching to meet the many-core bandwidth challenge. Our optical technology is enabled by the prosperity of silicon photonic devices. Optical burst switching is a natural paradigm for bursty traffic which is common found in on-chip slef-similar flows. Memory access overhead is amortized by big burst length. Results of performance simulation and analysis reveal its outstanding advantages over electronic I/O signaling in terms of throughput, latency and energy consumption.