Understanding how memory-level parallelism affects the processors performance

As the gap between processor and memory performance increases, performance loss due to long-latency memory accesses become a primary problem. Memory-level parallelism (MLP) improves performance by accessing memory concurrently. An effective system performance analysis model and method is lacked for these researches. Using queuing theory, we establish a system performance analysis model for MLP. Compared with experimental results, the performance trend of the model is accurate. This model can quickly and accurately characterize the features of the system. The average error rate of model is 12%. This model can effectively introduce the initial MLP system design.