Impact of back bias on ultra-thin body and BOX (UTBB) devices

We present a detailed study of back bias (V
_bb
) impact on UTBB devices with a gate length (L
_G
) of 25nm and BOX thicknesses (TBOX) of 25nm and 10nm, respectively. It is reported for the first time that the Vt is modulated by V
_bb
across a wide temperature range, from -40°C to 125°C. The device electrostatics and reliability, under various V
_bb
are investigated. The short channel effect (SCE) is well maintained across the bias points. NFET GIDL and HCI both improve when negative bias is applied. The V
_bb
effect on ring oscillators' (ROs) performance, based on 100nm contacted gate pitch (CPP), and on a 0.08μm
²
6-T SRAM, based on 80nm CPP, are reported for the first time. Clear RO performance/leakage tradeoff and SRAM static noise margin (SNM) modulation by V
_bb
are observed. SNM of 206mV is achieved at Vdd=0.9V.