VSI load online state-space estimator with FPGA based modulator-sampler

In this paper, a VSI load equivalent is identified as seen from the inverter using recursive least-squares (RLS). By using a single FPGA, sampling points can be synchronized to the space vector modulated (SVM) switching pattern of the inverter, thereby avoiding switching glitch. This reduces the measurement noise significantly and improves the RLS estimate. Synchronized sampling also allows for direct measurement of the derivative within each state of a symmetric SVM pattern, allowing direct estimation of a time-continuous load equivalent. The estimation is simplified by estimating each row of the state-space matrices separately, thereby reducing the computational cost. This makes the method well suited for online implementation. Experiments are conducted using an inverter connected to both induction motor and a three-phase grid.