A reconfigurable fabric supporting full C/C++ input

Reconfigurable architectures have been widespread used to improve the performance of embedded applications. As most applications of this domain (e.g. video and audio standards) are traditionally specified in high-level programming languages (e.g. C/C++, Java, etc), their optimization process through a hardware accelerator relies on a source code translation from high- to low- level programming languages (e.g. VHDL and Verilog) to program the reconfigurable fabric. However, there is no automatic process to perform such translation. Moreover, the lower the level of the programming language is, the harder it is to manually specify the algorithm, which can greatly affect the hard time-to market imposed by the embedded market. In this paper, we present an easy-programmed reconfigurable fabric that accelerates embedded applications in a total transparent fashion. We propose the use of a run-time binary translation hardware that translates C/C++ source code to the reconfigurable fabric code, without human intervention. Experimental results show great speedups w.r.t. a general-purpose processor and advantageous tradeoff between performance and software productivity w.r.t. a traditional FPGA.