DSP-based half-pel motion estimation implementation for H.264 baseline encoder

Motion Estimation module in H.264/AVC video encoder has the most computational load and memory access complexity, since it includes integer and fractional motion vector estimation. In the present paper, fractional motion estimation process analysis is performed based on which a Digital Signal Processor (DSP) specific optimized implementation is developed. The integration of the interpolation module decreases drastically the encoding speed when improving rate distortion performance. To overpass encoding speed degradation, parallelism between algorithm execution and data transfers were fully exploited using Enhanced Direct Memory Access engine (EDMA). Furthermore, based on the DSP architectural features, core specific optimization techniques were adopted leading to reduce the interpolation module complexity up to 70%.