A multilevel QAM demodulator VLSI with wideband carrier recovery and dual equalizing mode

A 16-/64-/256-quadrature amplitude modulation (QAM) demodulator LSI with an all-digital carrier-recovery loop including a novel phase detector and a fractionally/symbol-spaced equalizer is described. The phase detector, which decides the transmitted symbol from received signal power, detects phase errors up to /spl plusmn/45/spl deg/ and enables the loop to internally eliminate the /spl plusmn/80 kHz carrier-frequency offset. The fractionally spaced equalizer is implemented at the same clock rate as the symbol-spaced equalizer by increasing only multiplexers and flip-flops, though the former theoretically requires an operation twice as fast as the latter. A large scale integrator (LSI) operating at a symbol rate up to 8 MBaud is successfully implemented. The 0.5-/spl mu/m CMOS three-metal technology is used to implement 880 000 transistors in a die size of 12.87/spl times/12.39 mm/sup 2/.