A PAL/NTSC digital video encoder on 0.6-/spl mu/m CMOS with 66 dB typical SNR, 0.4% differential gain, and 0.2/spl deg/ differential phase

A digital video encoder chip which generates phase alternate (PAL) or National Television Standards Committee (NTSC) analog video output signals is presented. The chip operates from 3 to 5.5 V; typical differential gain and phase performance at 5 V is 0.4% and 0.2/spl deg/, respectively, and SNR is 66 dB rms. The architecture, circuit, and die size minimization techniques used to achieve this performance in a 4/spl times/4 mm CMOS die are presented. The die is packaged in a 44-pin plastic quad flatpack package (7/spl times/7 mm). The digital logic has 47 k gates and achieves an average power dissipation of 0.37 /spl mu/W/gate/MHz. The paper also covers the circuit and packaging techniques used to reduce power, /spl Theta/ J-A, and junction temperature in this package in order to allow continuous operation in still-air ambient temperatures of 70/spl deg/C.