An apodized surface grating coupler enabling the fabrication of silicon photonic nanowire sensor circuits in one lithography step

We present the design, fabrication, and experimental characterization of a silicon surface grating coupler that enables the creation of complete photonic nanowire sensor circuits in a single lithography step on a standard SOI wafer. This advance is achieved without sacrifices in the coupling efficiency through the use of an apodization algorithm that tunes the width of each gap and bar in the grating. This design optimization provides a high light coupling efficiency and a low back reflection with a grating etched fully through the SOI device layer. We experimentally demonstrate a coupling efficiency of 35% on a standard SOI substrate at a wavelength of 1536 nm, and show that with an optimized buried oxide (BOX) thickness, a coupling efficiency of 72% could be achieved.