Quasi-saturation capacitance behavior of a DMOS device

This paper reports a simulation study on the capacitance characteristics of a double-diffused metal-oxide semiconductor (DMOS) device operating in the quasi-saturation region. From the analysis, the capacitance effect of the gate oxide upon the drift region cannot be modeled as an overlap capacitance, because the drain-gate/source-gate capacitances of the DMOS device may exceed the gate-oxide capacitance due to the larger voltage drop over the gate oxide than the change in the imposed gate bias when entering the quasi-saturation region. This effect can be the explanation for the plateau behavior in the gate charge plot during turn-on and turn-off of the DMOS device. Based on the small-signal equivalent capacitance model, the accumulated charge in the drift region below the gate oxide may thoroughly associate with the drain terminal in the prequasi-saturation region and with the source terminal in the quasi-saturation region.