Electromigration behavior of interconnects between chip and board for embedded wafer level ball grid array (eWLB)

The electromigration (EM) behavior at critical interfaces of copper redistribution layers (RDL) used in an embedded wafer level ball grid array (eWLB) package has been studied. The EM failure times at the chip pad and solder ball interface were measured for various design configurations such as via diameter, additional under bump metallization or RDL shapes for different current directions. The maxium currents at the chip pad interface are limited by voiding in the relatively thin aluminum pad underneath the copper RDL via followed by liner punch-through during downstream stress. The corresponding activation energies (E
_a
) and current density exponents (n) are the typical ones found for polycrystalline aluminum lines. In contrast, the solder/RDL interface is critical when operated in upstream direction. The voiding is driven by copper migration causing accelerated Cu-consumption at the transition between RDL feeding line and solder ball, which is the location with the highest current density, defined Cu/Cu
₃
Sn intermetallic compound (IMC) boundaries and pre-existing Kirkendall voids. For the solder interface, a typical E
_a
-value around 1.0 eV was found in combination with a n-value far above 2.0 which we associate with an additional diffusional contribution to the overall migration rate in Black's equation rather than Joule heating.