Implementation of fully isolated Low Vgs nLDMOS with low specific on-resistance

In this paper, we present a new isolated Low Vgs NLDMOS in 0.35um BCDMOS process. The proposed LDMOS is fully isolated from substrate and has very lower Rsp(specific on-resistance) than other competitors. This device can apply a negative bias to drain and it can be used in AMOLED application. The proposed LDMOS devices in 30-40V ranges have the lowest Rsp with other competitors in 0.13-0.35um BCDMOS technologies. And the Rsp of the proposed LDMOS in 40V range is 46.3% lower than Low Vgs LDMOS last reported. And the isolation efficiency of the proposed LDMOS has very good performance. Furthermore, a logic CMOS and all the other components are compatible in the proposed process.