A concurrent low-area dual band 0.9/2.4 GHz LNA in 0.13µm RF CMOS technology for multi-band wireless receiver

This article presents the design of a low area novel concurrent dual-band LNA operating in the GSM 0.9GHz/BLUETOOTH 2.4GHz communication standards. The concurrent LNA is designed and simulated in CADENCE using 130nm UMC technology. A conventional source degeneration inductor is eliminated for higher signal gain while providing reasonable input impedance. Also by adding a capacitor between the gate and the source of the input transistor, a noise source from the gate resistance is partly suppressed. The output matching network is constructed of shunt peaking. It's easy to achieve matching and reduced chip size. The current design is especially suitable for use in multi-standard wireless receiver frontends as it saves die area and reduces power consumption by replacing parallel LNAs for each channel frequency. Simulation results indicate a Noise Figure below 2dB and S
₂₁
above 14 dB in all frequency bands and also input and output return loss are below -10 dB for all desired frequency band while drawing 10mA current from a 1.2V power supply.