Fabrication of Si and SiGe vertical dual carrier field effect transistor and its SOI resistor load switching ASIC with effective channel length of 30nm

Fabrication of Si and SiGe vertical dual carrier field effect transistor (VDCFET) with effective channel length of 30nm, using lithographic equipment for linewidths greater than 180nm, is presented. The main process of fabrication used is ion implantation for Si VDCFET. The main process of fabrication used is molecular beam epitaxy for SiGe VDCFET. Fabrication of SOI switching VDCFET flip flop with effective channel length of 30nm, using lithographic equipment for linewidths greater than 180nm, is also presented.