A novel divider based on dual-bit algorithm

The divider is one of the most important modules in microprocessor. A novel divider based on dual-bit algorithm and the VLSI implementation is presented. Compared with the divider of MIPS microprocessor, it decreases the average executing cycles by 57.5%, while its maximum delay is almost the same and its transistor count increases by 60%. The theoretical calculation indicates that the power consumption decreases to 12.3% with the equal operation ability.