Switching distributions and write reliability of perpendicular spin torque MRAM

We report data from 4-kbit spin torque MRAM arrays using tunnel junctions (TJs) with magnetization perpendicular to the wafer plane. We show for the first time the switching distribution of perpendicular spin torque junctions. The percentage switching voltage width, σ(Vc)/<Vc> = 4.4%, is sufficient to yield a 64 Mb chip. Furthermore we report switching probability curves down to error probabilities of 5×10⁻⁹ per pulse which do not show the anomalous switching seen in previous studies of in-plane magnetized bits.