High-mobility 0.85nm-EOT Si0.45Ge0.55-pFETs: Delivering high performance at scaled VDD

This work demonstrates the successful integration of 0.85nm-EOT Si
0.45
Ge
0.55
-pFETs using a gate first approach. An in-depth analysis, ranging from capacitor-level up to circuit-level is carried out, with systematic benchmarking to a conventional Si-channel reference. Outperforming the state-of-the-art Si
0.55
Ge
0.45
-pFETs, an I
ON
of 630µA/µm at L
G_POLY
= 35nm with I
OFF
= 100nA/µm and V
DD
= −1V has been achieved without any epi-S/D boosters. Significant improvements at lower V
DD
have also been confirmed through complex circuit simulations and validated by experimental results.