Effect of underfills on board level reliability of area array package with stress calculation

Board level drop test and thermal cycle are the keys qualification tests to ensure the solder joint reliability. It becomes critical due to leadfree solder. The work reported here explores the effect of underfill on drop test and thermal cycle reliability of area array packages, such as BGA's, CSP's, and WLCSP's. An unfilled underfill was found to provide superior drop test performance. Silica filled underfill was found to provide superior thermal cycle performance. However, if the unfilled underfill provides adequate thermal cycle performance, it use yields substantial process benefits. At the same time we also use stress calculation method to predict the thermal cycle stress on solder joints, and compare their results with thermal cycle experiments by using three different underfill adhesives. Both stress calculation and experiment results show that the lower CTE of underfill will induce lower thermal stress and better thermal cycle result. We also find underfill provide significant different thermal cycle result while comparing with the no underfill one. Finally, we will also review the processability, which includes investigation of capillary flow, and curing condition.