High voltage buried P+ layer membrane silicon-on-insulator

A new high voltage buried P+ layer membrane SOI (BP+M SOI) is proposed. Its Breakdown voltage (BV) is only decided by lateral breakdown voltage like Camsemi SOI. Introducing of P+ layer can effectively reduce specific on-resistance and alleviate self-heating effect (SHE). The electric characterizations are researched for the new structure by using 2D MEDICI software. The simulation results show that breakdown voltage is 717V and increases by 531V at L
_d
=37μm, t
_s
=4μm and t
_I
=1μm, in comparison with that of SOI LDMOS. In contrast to Camsei SOI, the maximal temperature of MBP+ SOI is decreased by 8K and specific on-resistance is also reduced greatly.