Peripheral domain switching and fatigue-resistive readout of ferroelectric random access memories

For the integration of high-density ferroelectric random access memories, each memory cell can be formed at the cross point of a plate line and a common node electrode, where the ferroelectric film is continuous between them. However, the peripheral region beyond the cross point of each cell without electrode coverage could also switch under the writing/reading pulse. To avoid this crosstalk problem between adjacent memory cells, the safest distance between the cells is estimated to be 0.27-0.34 μm for Pb(Zr, Ti)O
₃
thin-film capacitors from short pulse measurements. With the shortening of the repetitive reading/wiring pulse width down to domain switching time, the capacitor with Pt electrodes is rather fatigue resistive.