A 512kb 8T SRAM Macro Operating Down to 0.57 V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45 nm SOI CMOS

An 8T SRAM fabricated in 45
$\,$
nm SOI CMOS exhibits voltage scalable operation from 1.2
$\,$
V down to 0.57
$\,$
V with access times from 400
$\,$
ps to 3.4
$\,$
ns. Timing variation and the challenge of low voltage operation are addressed with an AC-coupled sense amplifier. An area efficient data path is achieved with a regenerative global bitline scheme. Finally, a data retention voltage sensor has been developed to predict the mismatch-limited minimum standby voltage without corrupting the contents of the memory.