Using IBIS-AMI models to study clock recovery loop performance

Clock recovery loop behavior can seriously affect the performance of a high speed serial channel, and yet very little definitive data is available on the performance of the clock recovery loops in SerDes macros. This paper introduces a method for extracting the jitter transfer function and pattern dependent jitter from an IBIS-AMI model under realistic channel conditions, and presents example results from a generic bang-bang clock recovery design and seven commercial SerDes designs.