QuickPath Interconnect (QPI) design and analysis in high speed servers

Increase in processor speeds and recent advancements in processor performance through developments such as multi-core processing and simultaneous multi-threading (SMT) have resulted in a need for faster processor interconnect technology. The Intel® QuickPath Interconnect (QPI) is a high-speed, packetized, point-to-point interconnect used in Intel's next generation of microprocessors. Compared to its predecessor front-side bus (FSB), it offers much higher bandwidth with low latency. In this paper, electrical design characteristics of a QPI interface are analyzed in a high-end rack or blade server application. Also, the electrical challenges faced in designing the QPI interface in a high-end server environment from a signal integrity perspective are discussed. Sensitivity analysis on various uncontrollable electrical parameters is performed to understand their impact on QPI interface.